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http://ps2.ign.com/articles/585/585865p1.html
# Each Cell processor contains 8 Synergistic Processing Units and a single 64-bit Power Architecture Unit (All are RISC designs with SIMD)
# Operates at >4GHz and capable of >256GFLOPS
# 256KB Local Storage per SPU and 512KB L2 Cache (2.5MB total)
# 128+ concurrent transactions to memory per processor
# High-speed internal element interconnect performing at 96B/cycle
# 234 million transistors
# Prototype die size of 221mm^2
# Fabricated with 90nm SOI process technology
# Each Cell processor contains 8 Synergistic Processing Units and a single 64-bit Power Architecture Unit (All are RISC designs with SIMD)
# Operates at >4GHz and capable of >256GFLOPS
# 256KB Local Storage per SPU and 512KB L2 Cache (2.5MB total)
# 128+ concurrent transactions to memory per processor
# High-speed internal element interconnect performing at 96B/cycle
# 234 million transistors
# Prototype die size of 221mm^2
# Fabricated with 90nm SOI process technology